Logic gates are used extensively in digital integrated circuits. FIG. 1 shows a conventional NOR gate formed with M identical enhancement-mode N-channel insulated-gate field-effect transistors (FET's) Q1.sub.1, Q1.sub.2, . . . and Q1.sub.M whose (insulated) gate electrodes respectively receive M input signal voltages V.sub.I1, V.sub.I2, . . . and V.sub.IM. The drains of FET's Q1.sub.1 -Q1.sub.M are connected to an electrical conductor LD that provides an output signal voltage V.sub.O as the logical NOR of input voltages V.sub.I1 -V.sub.IM. A current supply 10 consisting of a depletion-mode N-channel FET QS is source-to-drain connected between conductor LD and a terminal for a high supply voltage V.sub.DD. FET QS has its gate electrode tied to its source so as to act as a load for FET's Q1.sub.1 -Q1.sub.M. Their sources are connected to a terminal for a low supply voltage V.sub.SS by way of another electrical conductor LS.
Use of conventional terminology for positive logic facilitates an understanding of the operation of this gate. A low voltage is a logical low referred to as logical "0". A high voltage is a logical high referred to as logical "1".
Each FET Q1.sub.1. . . or Q1.sub.M is turned on when corresponding input V.sub.I1 . . . or V.sub.IM is at a logical high voltage exceeding V.sub.SS by at least the FET threshold voltage. Output V.sub.O is at logical "1" when inputs V.sub.I1 -V.sub.IM are all at logical "0" so that FET's Q1.sub.1 -Q1.sub.M are off. As one of inputs V.sub.I1 -V.sub.IM rises to logical "1" to turn on the corresponding one of FET's Q1.sub.1 -Q1.sub.M, output V.sub.O falls to logical "0".
The actual logical low voltage level for output V.sub.O depends upon the number of FET's Q1.sub.1 -Q1.sub.M turned on. The logical "0" voltage is lower when more of FET's Q1.sub.1 -Q1.sub.M are conductive. This is disadvantageous in many applications because the time needed to differentially sense output V.sub.O can vary drastically from the case where one of FET's Q1.sub.1 -Q1.sub.M is turned on to the situation where all are conductive.